LCD controller

The LCD controller can be programmed to support different LCD screen requirements, such as row and column pixels, data bus width, interface timing, and refresh frequency.

The main job of the LCD controller is to transfer LCD image data located in the display buffer in the system memory to the external LCD driver.

Register control 18 programmable LCD control registers are configured;

DMA transfer control automatically transmits frame buffer data to LCD screen via data control;

Data control will display data output VD in 4/8 single scan or 4-bit double scan mode [7:0];

Signal generating circuit produces VFRAME, VLINE, VCLK, VM and other signals.

(1) VFRAME:

Frame synchronization signal between LCD controller and LCD driver. This signal tells the LCD screen that a new frame has started.

The LCD controller inserts a VFRAME signal immediately after the completion of a full frame display to start the display of a new frame. The signal corresponds to YD signal of LCD module.

(2) VLINE:

A line-synchronous pulse signal between the LCD controller and the LCD driver used to transmit the contents of the horizontal line (row) shift register to the LCD display.

The LCD controller inserts a VLINE signal after the entire horizontal line (entire line) data is moved to the LCD driver; The signal corresponds to the LP signal of the LCD module.

(3) VCLK: Pixel clock signal between LCD controller and LCD driver. Data sent by LCD controller is sent out at the rising edge of VCLK and sampled at the falling edge of VCLK by LCD driver; This signal corresponds to THE XCK signal of the LCD module.

(4) VM: LCD driver AC signal. VM signals are used by the LCD driver to change the voltage polarity of rows and columns to control the display or extinction of pixels. VM signals can be synchronized with each frame or with a variable number of VLINE signals. This signal corresponds to the DISP signal of the LCD module.