LVDS

LVDS output interface overview

In addition to the RGB digital signals, the digital signals output by the LCD driver board also include line synchronization, field synchronization, pixel clock and other signals. The highest frequency of the pixel clock signal can exceed 28MHZ. The TTL interface is adopted, and the data transmission rate is not high. , The transmission distance is short, and the electromagnetic anti-interference ability is poor, which will affect the RGB data to a certain extent. In addition, the TTL multi-channel data signal is transmitted by the method of flat cable. The number of the entire flat cable reaches dozens of channels, not only the connection is not Convenient, and not suitable for the ultra-thin trend, the use of LVDS output interface to transmit data can solve these problems, and achieve high-speed, low-noise, long-distance, and high-accuracy data transmission. The LVDS output interface uses very low voltage swing (about 350mV) to transmit data through two PCB traces or a pair of balanced cables through differential, that is, low-voltage differential signal output. The LVDS output interface enables signals to be transmitted on differential PCB lines or balanced cables at a rate of several hundred Mbit/s. Due to the use of low voltage and low current driving methods, low noise and low power consumption are realized.

Composition of LVDS interface circuit

In the liquid crystal display, the LVDS interface circuit consists of two parts, namely the LVDS output drive circuit (LVDS transmitter) on the driver board side, and the LVDS input interface circuit (LVDS receiver) on the liquid crystal panel side. The LVDS transmitter converts the 17L level parallel RGB data signal and control signal output by the main control chip of the driver board into a low-voltage serial LVDS signal, and then transmits the signal to the liquid crystal through a flexible cable (line) between the driver board and the LCD panel The LVDS receiver on the panel side converts the serial signal into a TTL level parallel signal and sends it to the LVDS receiver on the LCD panel side. The LVDS receiver then converts the serial signal to a TTL level parallel signal. , Sent to the LCD screen timing control and row and column drive circuit.

In the process of data transmission, the clock signal must also be involved. The LVDS interface uses differential signal pairs to transmit both data and transmission clocks. The so-called signal pairs are just each data transmission channel or clock transmission in the LVDS interface circuit. The output of the channel is two signals (positive output and negative output). It should be noted that different LCD displays have different LVDS transmitters on the driver board. Some LVDS transmitters are one or two independent The chip (if DS90C383), some are integrated in the main control chip.

LVDS output interface circuit type

Single-channel 6-bit LVDS output interface: In this interface circuit, single-channel transmission is used, and each primary color (that is, any one of the RGB colors) signal uses 6-bit data.

Dual-channel 6-bit LVDS output interface: In this interface circuit, dual-channel transmission is adopted, and each primary color signal uses 6-bit data, of which the odd-channel data is 18-bit, the even-channel data is 18-bit, and the work 36-bit data, so , Also into 36-bit or 36-bit LVDS interface.

Single 8-bit 1TL output interface: This interface circuit adopts single-channel transmission, and the primary color signal adopts 8-bit data

Dual 8-bit 1TL output interface: In this interface circuit, dual-channel transmission is adopted, and each primary color signal uses 8-bit data, of which the odd-channel data is 24 bits, and the even-channel data is 24 bits, totaling 48 bits of RGB data. Therefore, it is also called 48-bit or 478-bit LVDS interface